Metal contacts are added to the front side and the backside. Thermal processing is used to diffuse the phosphorus into the boron-doped substrate, form the ohmic contacts on the front and back, and getter metal impurities away from being recombination centers. In principle the phosphorus diffuses conformally into the textured silicon surface, and hydrogen from the SiN diffuses into the substrate to passivate defects. Optimization of the thermal process for all these effects is one of the main engineering challenges.
On the right side of the schematic we see that failure analysis of the lower metal contact can be supported by XPS, FTIR and XPS. For the silicon wafer, doping errors can be determined by SIMS. Bulk total concentrations of [O], [C], and [N] can be measured by SIMS; FTIR does not provide total concentrations. Bulk defects can be analyzed by STEM/EDS, and bulk metal surveys can be done by GDMS.
For the upper layer of the silicon wafer, P concentrations at the top of the textured Si can be determined by FE-Auger, the p/n junction depth may be determined by cross section SCM (Scanning Capacitance Microscopy). The latter is under development at EAG. The texture itself, which in some cases can be quite complex and unexpected, can be characterized by profilometry or cross section SEM for finer spatial resolution. Gettering of metals can be analyzed by SIMS or STEM/EDS.
The ARC can be analyzed for H by FTIR. If there is an oxide layer between the ARC and textured Si, cross section SEM may be able to measure the thickness, and cross section STEM/EELS can verify the presence of O in the layer. If the ARC layer is deposited on a flat Si sample (not textured), RBS and HFS can provide stoichiometry